1. Field of the Invention
The present invention relates to liquid crystal display (LCD) devices. More particularly, the present invention relates to a driving method of an In-Plane Switching (IPS) mode LCD panel having a ferroelectric alignment film.
2. Discussion of the Related Art
Generally, LCD panels include a layer of liquid crystal material interposed between two glass substrates. Depending upon their construction and operation, LCD panels can be classified as Twisted Nematic (TN) mode LCD panels or In-Plane Switching (IPS) mode LCD panels.
TN mode LCD panels operate according to a perpendicular movement of liquid crystal molecules with respect to a substrate and include a transparent pixel electrode formed on a surface of one substrate and a common electrode formed on an opposing surface of an opposing substrate. Accordingly, the transparent electrodes apply an electric field, perpendicularly oriented with respect to the substrates, to the layer of liquid crystal material. Upon application of the electric field, liquid crystal molecules within the liquid crystal layer are moved perpendicularly with respect to the panel. TN mode LCD panels such as those described above can display images at a sufficiently high brightness but have a narrow range of viewing angles.
IPS mode LCD panels operate according to a parallel movement of liquid crystal molecules with respect to a substrate and include pixel and common electrodes formed on the same surface of only one of the two substrates. Accordingly, the electrodes apply a transverse electric filed, horizontally oriented with respect to the panel, to the layer of liquid crystal material. Upon application of the transverse electric field, liquid crystal molecules within the liquid crystal layer are moved along a parallel plane with respect to the substrates. Related art IPS mode LCD panels can display images over a wide range of viewing angles but do not display images at a sufficiently high brightness levels because the pixel and common electrodes, formed on the same substrate, block light emitted from a light source and reduce an aperture ratio of pixels within the LCD panel.
FIG. 1 illustrates a sectional view of a related art IPS mode LCD panel.
Referring to FIG. 1, the related art IPS mode LCD panel generally includes an upper substrate 10 and a lower substrate 12. A first alignment film 14A is formed on a surface of the upper substrate 10. A pixel electrode 16A and a common electrode 16B are formed on the surface of the lower substrate 12 and a second alignment film 14B is sequentially formed on the surface of the lower substrate 12 and on the pixel and common electrodes 16A and 16B. The upper substrate 10 and the lower substrate 12 are attached to each other such that the first alignment film 14A opposes the second alignment film 14B and liquid crystal layer 18 is interposed between the first and second alignment films 14A and 14B to form a liquid crystal (LC) cell.
Liquid crystal molecules within the liquid crystal layer 18 move along a plane parallel to the lower substrate 12 in response to traversely applied electric fields formed between the various electrode patterns formed on the lower substrate 12. By so moving the liquid crystal molecules, light transmittance characteristics of the LCD panel can be selectively controlled.
As described above, because both the pixel electrode 16A and the common electrode 16B are formed only on one of the substrates, an aperture ratio of pixels within the IPS mode LCDs is small, reducing the quantity of light transmitted by the related art IPS mode LCD panel to below a sufficient brightness level.
As is generally known, the related art TN and IPS mode LCD panels must be driven with a drive unit. Drive units typically include a central processing unit (CPU) that processes an externally input image signal and outputs synchronizing signals; a timing controller that generates a variety of signals from the synchronizing signals that enable the LCD panel to display images; a gate drive unit that supplies signal voltages to gate lines formed within the LCD panel using signals output by the timing controller; a data drive unit that supplies data signal voltages to data lines formed within the LCD panel using signals output by the timing controller; and a power source that generates a plurality of power voltages required by the drive unit.
Within each type of LCD panel, the lower substrate supports a plurality of gate lines, a plurality of data lines crossing the gate lines, a plurality of thin film transistors (TFTs) connected at crossings of the gate and data lines, wherein each TFT is turned on or off depending on a signal voltage applied to the gate line, and a plurality of pixel electrodes connected to the TFTs. When the TFT is turned on, a channel of the TFT is opened, a signal voltage applied to a predetermined data line is transmitted to the pixel electrode, and an electric field is generated between the pixel and common electrodes and an image is displayed on the LCD panel.
Liquid crystal material within the LCD panel may be prevented from degenerating by causing the data drive unit to supply a DC common voltage (Vcom) and DC data signal voltages having (+) and (−) polarities to the LCD panel. The data signal voltages having (+) and (−) polarities are alternately applied to the pixel electrodes between frames while the common voltage (Vcom) has a value corresponding to an average voltage of the applied data signal voltages and is applied to the common electrode.
FIG. 2 illustrates waveforms of voltages applied during a related art method of driving LCD panels.
Referring to FIG. 2, TFTs are turned on or off in accordance with an applied gate voltage. Therefore, when a gate high voltage Vgh of 21V is applied to a gate of a TFT, the gate is opened and the TFT is turned on. Conversely, when a gate low voltage Vgl of −5V is applied to a gate of a TFT, the gate is closed and the TFT is turned off. The common voltage (Vcom) applied to the common electrode constitutes a uniform DC waveform. The polarity of data signal voltages V2 and V1 applied to the LC cell is periodically inverted with respect to the common voltage according to a driving frequency of the LCD panel.
As shown in FIG. 2, the rising time 200 indicates the amount of time required by the LC cell to become effectively charged from data signal voltage V1 to data signal voltage V2 and transmit light at brightness level L3. Similarly, the falling time 210 indicates the amount of time required by the LC cell to become effectively charged from data signal voltage V2 to with data signal voltage V1 and transmit light at brightness level L1. The slow response speeds make it difficult for related art LCD panels to effectively display moving pictures.